1. Field of the Invention
The present invention relates to a liquid crystal display (LCD), and more particularly to an active device array substrate.
2. Description of Related Art
In recent years, since an optoelectronic technology and a semiconductor device manufacturing technology become more mature, flat panel displays have been accordingly developed. Among the flat panel displays, a liquid crystal display (LCD) is widely adopted to gradually replace a conventional CRT display and has become a main stream of displays on the market due to its advantages of low operation voltage, radiation free, light weight, small volume occupancy, and so forth.
A thin film transistor liquid crystal display (TFT-LCD) is taken for an example. The TFT-LCD includes an active device array substrate, an opposite substrate disposed above the active device array substrate, a liquid crystal layer sandwiched between the active device array substrate and the opposite substrate, a gate driving circuit and a source driving circuit. The gate driving circuit and the source driving circuit are electrically connected with scan lines and data lines, respectively. Each pixel in the TFT-LCD is controlled by the corresponding TFT, and the TFT is electrically connected to the corresponding scan line and the corresponding data line.
As the TFT-LCD performs a display function, the gate driving circuit sequentially provides scan signals to each scan line, so as to turn on the TFTs in the pixels controlled by each scan line in sequence. As the TFTs controlled by each scan line are turned on, a data voltage provided by the source driving circuit is inputted into the pixels. It should be noted that when the TFTs of the pixels controlled by one scan line are turned on, the TFTs of the pixels controlled by the previous scan line should be turned off for sure, so as to avoid the data voltage from being inputted to the pixels controlled by the previous scan line. However, with an increasing demand on large-size and high-resolution TFT-LCDs, the number of the pixels controlled by each of the scan lines on the active device array substrate is increased, such that gate delay effect occurring in each of the scan lines is exaggerated.
To resolve said issue of the gate delay effect, several solutions have been proposed by the related art. One of the solutions is to install a voltage pull-down circuit on each of the scan lines. For example, the voltage pull-down circuit as depicted in FIG. 1 is able to improve the gate delay effects. Referring to FIG. 1, a voltage pull-down circuit 10 is electrically connected to a scan line Sn, a next scan line Sn+1 and a bus line 12 having a gate-off voltage level Vgl. As the pixels controlled by the next scan line Sn+1 are turned on, a gate-on voltage level Vgh of the scan line Sn is rapidly pulled down to the gate-off voltage level Vgl through the voltage pull-down circuit 10. Thereby, the issue arisen from the gate delay effect can be effectively resolved.
However, during a process of fabricating the LCD, as the voltage pull-down circuit is damaged by electrostatic discharge (e.g. charges generated by a plasma which is used in a thin film deposition or a dry etching, the charges generated by an alignment rubbing process, or the charges generated from conducting a charge test on a substrate), the voltage pull-down circuit may not function, leading to occurrence of line defect.